Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
#define SI_TILE_MODE_DEPTH_STENCIL_2D_4AA 3
#define SI_TILE_MODE_DEPTH_STENCIL_2D_8AA 2
#define SI_TILE_MODE_DEPTH_STENCIL_2D_4AA 3
#define SI_TILE_MODE_DEPTH_STENCIL_2D_8AA 2
+#define CIK_TILE_MODE_DEPTH_STENCIL_1D 5
+
break;
case RADEON_SURF_MODE_1D:
if (surf->flags & RADEON_SURF_SBUFFER) {
break;
case RADEON_SURF_MODE_1D:
if (surf->flags & RADEON_SURF_SBUFFER) {
- *stencil_tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
+ if (surf_man->family >= CHIP_BONAIRE)
+ *stencil_tile_mode = CIK_TILE_MODE_DEPTH_STENCIL_1D;
+ else
+ *stencil_tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
}
if (surf->flags & RADEON_SURF_ZBUFFER) {
}
if (surf->flags & RADEON_SURF_ZBUFFER) {
- *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
+ if (surf_man->family >= CHIP_BONAIRE)
+ *tile_mode = CIK_TILE_MODE_DEPTH_STENCIL_1D;
+ else
+ *tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
} else if (surf->flags & RADEON_SURF_SCANOUT) {
*tile_mode = SI_TILE_MODE_COLOR_1D_SCANOUT;
} else {
} else if (surf->flags & RADEON_SURF_SCANOUT) {
*tile_mode = SI_TILE_MODE_COLOR_1D_SCANOUT;
} else {
tile_mode = SI_TILE_MODE_COLOR_1D_SCANOUT;
break;
case SI_TILE_MODE_DEPTH_STENCIL_2D:
tile_mode = SI_TILE_MODE_COLOR_1D_SCANOUT;
break;
case SI_TILE_MODE_DEPTH_STENCIL_2D:
- tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
+ if (surf_man->family >= CHIP_BONAIRE)
+ tile_mode = CIK_TILE_MODE_DEPTH_STENCIL_1D;
+ else
+ tile_mode = SI_TILE_MODE_DEPTH_STENCIL_1D;
break;
default:
return -EINVAL;
break;
default:
return -EINVAL;