mmc: mmc: Add Command Queue definitions

Add definitions relating to Command Queuing.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 3268fcd..16cf6ea 100644 (file)
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -618,6 +618,24 @@ static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd)
                        (ext_csd[EXT_CSD_SUPPORTED_MODE] & 0x1) &&
                        !(ext_csd[EXT_CSD_FW_CONFIG] & 0x1);
        }
                        (ext_csd[EXT_CSD_SUPPORTED_MODE] & 0x1) &&
                        !(ext_csd[EXT_CSD_FW_CONFIG] & 0x1);
        }

+
+       /* eMMC v5.1 or later */
+       if (card->ext_csd.rev >= 8) {
+               card->ext_csd.cmdq_support = ext_csd[EXT_CSD_CMDQ_SUPPORT] &
+                                            EXT_CSD_CMDQ_SUPPORTED;
+               card->ext_csd.cmdq_depth = (ext_csd[EXT_CSD_CMDQ_DEPTH] &
+                                           EXT_CSD_CMDQ_DEPTH_MASK) + 1;
+               /* Exclude inefficiently small queue depths */
+               if (card->ext_csd.cmdq_depth <= 2) {
+                       card->ext_csd.cmdq_support = false;
+                       card->ext_csd.cmdq_depth = 0;
+               }
+               if (card->ext_csd.cmdq_support) {
+                       pr_debug("%s: Command Queue supported depth %u\n",
+                                mmc_hostname(card->host),
+                                card->ext_csd.cmdq_depth);
+               }
+       }

 out:
        return err;
 }
 out:
        return err;
 }

diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index e49a3ff..95d69d4 100644 (file)
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -89,6 +89,8 @@ struct mmc_ext_csd {
        unsigned int            boot_ro_lock;           /* ro lock support */
        bool                    boot_ro_lockable;
        bool                    ffu_capable;    /* Firmware upgrade support */
        unsigned int            boot_ro_lock;           /* ro lock support */
        bool                    boot_ro_lockable;
        bool                    ffu_capable;    /* Firmware upgrade support */

+       bool                    cmdq_support;   /* Command Queue supported */
+       unsigned int            cmdq_depth;     /* Command Queue depth */

 #define MMC_FIRMWARE_LEN 8
        u8                      fwrev[MMC_FIRMWARE_LEN];  /* FW version */
        u8                      raw_exception_status;   /* 54 */
 #define MMC_FIRMWARE_LEN 8
        u8                      fwrev[MMC_FIRMWARE_LEN];  /* FW version */
        u8                      raw_exception_status;   /* 54 */

diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index c376209..672730a 100644 (file)
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -84,6 +84,13 @@
 #define MMC_APP_CMD              55   /* ac   [31:16] RCA        R1  */
 #define MMC_GEN_CMD              56   /* adtc [0] RD/WR          R1  */
 
 #define MMC_APP_CMD              55   /* ac   [31:16] RCA        R1  */
 #define MMC_GEN_CMD              56   /* adtc [0] RD/WR          R1  */
 

+  /* class 11 */
+#define MMC_QUE_TASK_PARAMS      44   /* ac   [20:16] task id    R1  */
+#define MMC_QUE_TASK_ADDR        45   /* ac   [31:0] data addr   R1  */
+#define MMC_EXECUTE_READ_TASK    46   /* adtc [20:16] task id    R1  */
+#define MMC_EXECUTE_WRITE_TASK   47   /* adtc [20:16] task id    R1  */
+#define MMC_CMDQ_TASK_MGMT       48   /* ac   [20:16] task id    R1b */
+

 static inline bool mmc_op_multi(u32 opcode)
 {
        return opcode == MMC_WRITE_MULTIPLE_BLOCK ||
 static inline bool mmc_op_multi(u32 opcode)
 {
        return opcode == MMC_WRITE_MULTIPLE_BLOCK ||


@@ -272,6 +279,7 @@ struct _mmc_csd {
  * EXT_CSD fields
  */
 
  * EXT_CSD fields
  */
 

+#define EXT_CSD_CMDQ_MODE_EN           15      /* R/W */

 #define EXT_CSD_FLUSH_CACHE            32      /* W */
 #define EXT_CSD_CACHE_CTRL             33      /* R/W */
 #define EXT_CSD_POWER_OFF_NOTIFICATION 34      /* R/W */
 #define EXT_CSD_FLUSH_CACHE            32      /* W */
 #define EXT_CSD_CACHE_CTRL             33      /* R/W */
 #define EXT_CSD_POWER_OFF_NOTIFICATION 34      /* R/W */


@@ -331,6 +339,8 @@ struct _mmc_csd {
 #define EXT_CSD_CACHE_SIZE             249     /* RO, 4 bytes */
 #define EXT_CSD_PWR_CL_DDR_200_360     253     /* RO */
 #define EXT_CSD_FIRMWARE_VERSION       254     /* RO, 8 bytes */
 #define EXT_CSD_CACHE_SIZE             249     /* RO, 4 bytes */
 #define EXT_CSD_PWR_CL_DDR_200_360     253     /* RO */
 #define EXT_CSD_FIRMWARE_VERSION       254     /* RO, 8 bytes */

+#define EXT_CSD_CMDQ_DEPTH             307     /* RO */
+#define EXT_CSD_CMDQ_SUPPORT           308     /* RO */

 #define EXT_CSD_SUPPORTED_MODE         493     /* RO */
 #define EXT_CSD_TAG_UNIT_SIZE          498     /* RO */
 #define EXT_CSD_DATA_TAG_SUPPORT       499     /* RO */
 #define EXT_CSD_SUPPORTED_MODE         493     /* RO */
 #define EXT_CSD_TAG_UNIT_SIZE          498     /* RO */
 #define EXT_CSD_DATA_TAG_SUPPORT       499     /* RO */


@@ -438,6 +448,13 @@ struct _mmc_csd {
 #define EXT_CSD_MANUAL_BKOPS_MASK      0x01
 
 /*
 #define EXT_CSD_MANUAL_BKOPS_MASK      0x01
 
 /*

+ * Command Queue
+ */
+#define EXT_CSD_CMDQ_MODE_ENABLED      BIT(0)
+#define EXT_CSD_CMDQ_DEPTH_MASK                GENMASK(4, 0)
+#define EXT_CSD_CMDQ_SUPPORTED         BIT(0)
+
+/*

  * MMC_SWITCH access modes
  */
 
  * MMC_SWITCH access modes
  */