ot1200: move ccgr and gpr init to c functions

We need this way for SPL boot.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>

diff --git a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg b/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
index bb6c60b..c25f99d 100644 (file)
--- a/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
+++ b/board/bachmann/ot1200/mx6q_4x_mt41j128.cfg
@@ -142,20 +142,6 @@ DATA 4 0x021b48b8 0x00000800
 DATA 4 0x021b001c 0x00000000
 DATA 4 0x021b0404 0x00011006
 
 DATA 4 0x021b001c 0x00000000
 DATA 4 0x021b0404 0x00011006
 

-/* set the default clock gate to save power */
-DATA 4 0x020c4068 0x00C03F3F
-DATA 4 0x020c406c 0x0030FC03
-DATA 4 0x020c4070 0x0FFFC000
-DATA 4 0x020c4074 0x3FF00000
-DATA 4 0x020c4078 0x00FFF300
-DATA 4 0x020c407c 0x0F0000C3
-DATA 4 0x020c4080 0x000003FF
-
-/* enable AXI cache for VDOA/VPU/IPU */
-DATA 4 0x020e0010 0xF00000CF
-/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-DATA 4 0x020e0018 0x007F007F
-DATA 4 0x020e001c 0x007F007F

 
 /*
  * Setup CCM_CCOSR register as follows:
 
 /*
  * Setup CCM_CCOSR register as follows:

diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c
index 039e858..6b6c1a3 100644 (file)
--- a/board/bachmann/ot1200/ot1200.c
+++ b/board/bachmann/ot1200/ot1200.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
  */
 
 #include <common.h>

+#include <asm/io.h>

 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>


@@ -119,8 +120,35 @@ static void setup_iomux_features(void)
                ARRAY_SIZE(feature_pads));
 }
 
                ARRAY_SIZE(feature_pads));
 }
 

+static void ccgr_init(void)
+{
+       struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+       writel(0x00C03F3F, &ccm->CCGR0);
+       writel(0x0030FC03, &ccm->CCGR1);
+       writel(0x0FFFC000, &ccm->CCGR2);
+       writel(0x3FF00000, &ccm->CCGR3);
+       writel(0x00FFF300, &ccm->CCGR4);
+       writel(0x0F0000C3, &ccm->CCGR5);
+       writel(0x000003FF, &ccm->CCGR6);
+}
+
+static void gpr_init(void)
+{
+       struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+       /* enable AXI cache for VDOA/VPU/IPU */
+       writel(0xF00000CF, &iomux->gpr[4]);
+       /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+       writel(0x007F007F, &iomux->gpr[6]);
+       writel(0x007F007F, &iomux->gpr[7]);
+}
+

 int board_early_init_f(void)
 {
 int board_early_init_f(void)
 {

+       ccgr_init();
+       gpr_init();
+

        setup_iomux_uart();
        setup_iomux_spi();
        setup_iomux_features();
        setup_iomux_uart();
        setup_iomux_spi();
        setup_iomux_features();