+@ r0: return value ARM_PSCI_RET_SUCCESS or ARM_PSCI_RET_INVAL
+@ r1: input target CPU ID in MPIDR format, original value in r1 may be dropped
+@ r4: output validated CPU ID if ARM_PSCI_RET_SUCCESS returns, meaningless for
+@ ARM_PSCI_RET_INVAL,suppose caller saves r4 before calling
+LENTRY(psci_check_target_cpu_id)
+ @ Get the real CPU number
+ and r4, r1, #0xff
+ mov r0, #ARM_PSCI_RET_INVAL
+
+ @ Bit[31:24], bits must be zero.
+ tst r1, #0xff000000
+ bxne lr
+
+ @ Affinity level 2 - Cluster: only one cluster in LS1021xa.
+ tst r1, #0xff0000
+ bxne lr
+
+ @ Affinity level 1 - Processors: should be in 0xf00 format.
+ lsr r1, r1, #8
+ teq r1, #0xf
+ bxne lr
+
+ @ Affinity level 0 - CPU: only 0, 1 are valid in LS1021xa.
+ cmp r4, #2
+ bxge lr
+
+ mov r0, #ARM_PSCI_RET_SUCCESS
+ bx lr
+ENDPROC(psci_check_target_cpu_id)
+