drm/i915/reg: add AUD_TCA_DP_2DOT0_CTRL registers

For controlling the audio SDP split.

Bspec: 63837
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211001100316.26441-1-jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c78337ab4f7b9ec9c2cc230ba91e8a40a215b3ef..c6e883bd48507e04057693cd2fb404894256c7a6 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9733,6 +9733,11 @@ enum {
 #define   AUDIO_CP_READY(trans)                ((1 << 1) << ((trans) * 4))
 #define   AUDIO_ELD_VALID(trans)       ((1 << 0) << ((trans) * 4))
 
 #define   AUDIO_CP_READY(trans)                ((1 << 1) << ((trans) * 4))
 #define   AUDIO_ELD_VALID(trans)       ((1 << 0) << ((trans) * 4))
 

+#define _AUD_TCA_DP_2DOT0_CTRL         0x650bc
+#define _AUD_TCB_DP_2DOT0_CTRL         0x651bc
+#define AUD_DP_2DOT0_CTRL(trans)       _MMIO_TRANS(trans, _AUD_TCA_DP_2DOT0_CTRL, _AUD_TCB_DP_2DOT0_CTRL)
+#define  AUD_ENABLE_SDP_SPLIT          REG_BIT(31)
+

 #define HSW_AUD_CHICKENBIT                     _MMIO(0x65f10)
 #define   SKL_AUD_CODEC_WAKE_SIGNAL            (1 << 15)
 
 #define HSW_AUD_CHICKENBIT                     _MMIO(0x65f10)
 #define   SKL_AUD_CODEC_WAKE_SIGNAL            (1 << 15)