MIPS: Loongson64: Load LS7A dtbs

Load correct devicetree according to PRID and PCH type.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/loongson64/env.c b/arch/mips/loongson64/env.c
index 3e7caba..2cb9573 100644 (file)
--- a/arch/mips/loongson64/env.c
+++ b/arch/mips/loongson64/env.c
@@ -126,28 +126,6 @@ void __init prom_init_env(void)
                loongson_sysconf.cores_per_node - 1) /
                loongson_sysconf.cores_per_node;
 
                loongson_sysconf.cores_per_node - 1) /
                loongson_sysconf.cores_per_node;
 

-       if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) {
-               switch (read_c0_prid() & PRID_REV_MASK) {
-               case PRID_REV_LOONGSON3A_R1:
-               case PRID_REV_LOONGSON3A_R2_0:
-               case PRID_REV_LOONGSON3A_R2_1:
-               case PRID_REV_LOONGSON3A_R3_0:
-               case PRID_REV_LOONGSON3A_R3_1:
-                       loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin;
-                       break;
-               case PRID_REV_LOONGSON3B_R1:
-               case PRID_REV_LOONGSON3B_R2:
-                       loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin;
-                       break;
-               default:
-                       break;
-               }
-       }
-
-
-       if (!loongson_fdt_blob)
-               pr_err("Failed to determine built-in Loongson64 dtb\n");
-

        loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
        loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
        loongson_sysconf.pci_io_base = eirq_source->pci_io_start_addr;
        loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
        loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
        loongson_sysconf.pci_io_base = eirq_source->pci_io_start_addr;


@@ -198,4 +176,38 @@ void __init prom_init_env(void)
                loongson_sysconf.bridgetype = RS780E;
                loongson_sysconf.early_config = rs780e_early_config;
        }
                loongson_sysconf.bridgetype = RS780E;
                loongson_sysconf.early_config = rs780e_early_config;
        }

+
+       if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) {
+               switch (read_c0_prid() & PRID_REV_MASK) {
+               case PRID_REV_LOONGSON3A_R1:
+               case PRID_REV_LOONGSON3A_R2_0:
+               case PRID_REV_LOONGSON3A_R2_1:
+               case PRID_REV_LOONGSON3A_R3_0:
+               case PRID_REV_LOONGSON3A_R3_1:
+                       switch (loongson_sysconf.bridgetype) {
+                       case LS7A:
+                               loongson_fdt_blob = __dtb_loongson64c_4core_ls7a_begin;
+                               break;
+                       case RS780E:
+                               loongson_fdt_blob = __dtb_loongson64c_4core_rs780e_begin;
+                               break;
+                       default:
+                               break;
+                       }
+                       break;
+               case PRID_REV_LOONGSON3B_R1:
+               case PRID_REV_LOONGSON3B_R2:
+                       if (loongson_sysconf.bridgetype == RS780E)
+                               loongson_fdt_blob = __dtb_loongson64c_8core_rs780e_begin;
+                       break;
+               default:
+                       break;
+               }
+       } else if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64G) {
+               if (loongson_sysconf.bridgetype == LS7A)
+                       loongson_fdt_blob = __dtb_loongson64g_4core_ls7a_begin;
+       }
+
+       if (!loongson_fdt_blob)
+               pr_err("Failed to determine built-in Loongson64 dtb\n");

 }
 }