TrimSlice's USB1 port has two purposes; it either acts as a device port
hosting Tegra's USB recovery protocol, or acts as a host port connected
to the internal USB->SATA bridge chip, which may in turn be connected to
an SSD or HDD. Add the appropriate device tree and board configuration
options to enable this port as a host port, and route the port to the
SATA bridge using the VBUS GPIO.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
aliases {
usb0 = "/usb@c5008000";
aliases {
usb0 = "/usb@c5008000";
+ usb1 = "/usb@c5000000";
+ nvidia,vbus-gpio = <&gpio 170 0>; /* PV2 */
+void pin_mux_usb(void)
+{
+ /*
+ * USB1 internal/external mux GPIO, which masquerades as a VBUS GPIO
+ * in the current device tree.
+ */
+ pinmux_tristate_disable(PINGRP_UAC);
+}
#define CONFIG_ENV_OFFSET (512 * 1024)
/* USB Host support */
#define CONFIG_ENV_OFFSET (512 * 1024)
/* USB Host support */
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_STORAGE
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_STORAGE