cxl/acpi: Add a host-bridge index lookup mechanism

The ACPI CXL Fixed Memory Window Structure (CFMWS) defines multiple
methods to determine which host bridge provides access to a given
endpoint relative to that device's position in the interleave. The
"Interleave Arithmetic" defines either a "standard modulo" /
round-random algorithm, or "xormap" based algorithm which can be defined
as a non-linear transform. Given that there are already more options
beyond "standard modulo" and that "xormap" may turn out to be ACPI CXL
specific, provide a callback for the region provisioning code to map
endpoint positions back to expected host bridge id (cxl_dport target).

For now just support the simple modulo math case and save the xormap for
a follow-on change.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20220624041950.559155-14-dan.j.williams@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
index ff6ea86..1bec383 100644 (file)
--- a/drivers/cxl/core/port.c
+++ b/drivers/cxl/core/port.c
@@ -1421,6 +1421,20 @@ static int decoder_populate_targets(struct cxl_switch_decoder *cxlsd,
        return rc;
 }
 
        return rc;
 }
 

+static struct cxl_dport *cxl_hb_modulo(struct cxl_root_decoder *cxlrd, int pos)
+{
+       struct cxl_switch_decoder *cxlsd = &cxlrd->cxlsd;
+       struct cxl_decoder *cxld = &cxlsd->cxld;
+       int iw;
+
+       iw = cxld->interleave_ways;
+       if (dev_WARN_ONCE(&cxld->dev, iw != cxlsd->nr_targets,
+                         "misconfigured root decoder\n"))
+               return NULL;
+
+       return cxlrd->cxlsd.target[pos % iw];
+}
+

 static struct lock_class_key cxl_decoder_key;
 
 /**
 static struct lock_class_key cxl_decoder_key;
 
 /**


@@ -1510,6 +1524,8 @@ struct cxl_root_decoder *cxl_root_decoder_alloc(struct cxl_port *port,
                return ERR_PTR(rc);
        }
 
                return ERR_PTR(rc);
        }
 

+       cxlrd->calc_hb = cxl_hb_modulo;
+

        cxld = &cxlsd->cxld;
        cxld->dev.type = &cxl_decoder_root_type;
        /*
        cxld = &cxlsd->cxld;
        cxld->dev.type = &cxl_decoder_root_type;
        /*

diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
index 5e84aa2..8f39cfb 100644 (file)
--- a/drivers/cxl/cxl.h
+++ b/drivers/cxl/cxl.h
@@ -322,11 +322,13 @@ struct cxl_switch_decoder {
  * struct cxl_root_decoder - Static platform CXL address decoder
  * @res: host / parent resource for region allocations
  * @region_id: region id for next region provisioning event
  * struct cxl_root_decoder - Static platform CXL address decoder
  * @res: host / parent resource for region allocations
  * @region_id: region id for next region provisioning event

+ * @calc_hb: which host bridge covers the n'th position by granularity

  * @cxlsd: base cxl switch decoder
  */
 struct cxl_root_decoder {
        struct resource *res;
        atomic_t region_id;
  * @cxlsd: base cxl switch decoder
  */
 struct cxl_root_decoder {
        struct resource *res;
        atomic_t region_id;

+       struct cxl_dport *(*calc_hb)(struct cxl_root_decoder *cxlrd, int pos);

        struct cxl_switch_decoder cxlsd;
 };
 
        struct cxl_switch_decoder cxlsd;
 };