For vr* processors start using vr.igen.

Sanitize out README.Cygnus.

diff --git a/sim/mips/.Sanitize b/sim/mips/.Sanitize
index b3b3e93..47c9d37 100644 (file)
--- a/sim/mips/.Sanitize
+++ b/sim/mips/.Sanitize
@@ -24,13 +24,6 @@ else
         lose_these_too="${r5900_files} ${lose_these_too}"
 fi
 
         lose_these_too="${r5900_files} ${lose_these_too}"
 fi
 

-vr4320_files="vr4320.igen"
-if ( echo $* | grep keep\-vr4320 > /dev/null ) ; then
-        keep_these_too="${vr4320_files} ${keep_these_too}"
-else
-        lose_these_too="${vr4320_files} ${lose_these_too}"
-fi
-

 tx3904_files="dv-tx3904cpu.c dv-tx3904irc.c dv-tx3904tmr.c"
 if ( echo $* | grep keep\-tx3904 > /dev/null ) ; then
         keep_these_too="${tx3904_files} ${keep_these_too}"
 tx3904_files="dv-tx3904cpu.c dv-tx3904irc.c dv-tx3904tmr.c"
 if ( echo $* | grep keep\-tx3904 > /dev/null ) ; then
         keep_these_too="${tx3904_files} ${keep_these_too}"


@@ -53,7 +46,7 @@ else
         lose_these_too="${sky_files} ${lose_these_too}"
 fi
 
         lose_these_too="${sky_files} ${lose_these_too}"
 fi
 

-vr5400_files="vr5400.igen mdmx.igen"
+vr5400_files="mdmx.igen"

 if ( echo $* | grep keep\-vr5400 > /dev/null ) ; then
         keep_these_too="${vr5400_files} ${keep_these_too}"
 else
 if ( echo $* | grep keep\-vr5400 > /dev/null ) ; then
         keep_these_too="${vr5400_files} ${keep_these_too}"
 else


@@ -70,7 +63,6 @@ Things-to-keep:
 
 ChangeLog
 Makefile.in
 
 ChangeLog
 Makefile.in

-README.Cygnus

 acconfig.h
 config.in
 configure
 acconfig.h
 config.in
 configure


@@ -90,6 +82,7 @@ vr.igen
 
 Things-to-lose:
 
 
 Things-to-lose:
 

+README.Cygnus

 
 Do-last:
 
 
 Do-last:
 


@@ -213,7 +206,7 @@ else
 fi
 
 
 fi
 
 

-vr5400_files="ChangeLog configure configure.in sim-main.h interp.c gencode.c mips.igen mips.dc vr5400.igen mdmx.igen vr.igen"
+vr5400_files="ChangeLog configure configure.in sim-main.h interp.c gencode.c mips.igen mips.dc mdmx.igen vr.igen"

 
 if ( echo $* | grep keep\-vr5400 > /dev/null ) ; then
        for i in $vr5400_files ; do
 
 if ( echo $* | grep keep\-vr5400 > /dev/null ) ; then
        for i in $vr5400_files ; do


@@ -242,7 +235,7 @@ else
        done
 fi
 
        done
 fi
 

-vr4320_files="ChangeLog Makefile.in configure configure.in mips.igen vr.igen vr4320.igen"
+vr4320_files="ChangeLog Makefile.in configure configure.in mips.igen vr.igen"

 
 if ( echo $* | grep keep\-vr4320 > /dev/null ) ; then
        for i in $vr4320_files ; do
 
 if ( echo $* | grep keep\-vr4320 > /dev/null ) ; then
        for i in $vr4320_files ; do

diff --git a/sim/mips/README.Cygnus b/sim/mips/README.Cygnus
index 5b646ef..8b59e88 100644 (file)
--- a/sim/mips/README.Cygnus
+++ b/sim/mips/README.Cygnus
@@ -25,9 +25,6 @@ instructions to an existing ISA.
 
 Known bugs?
 
 
 Known bugs?
 

-A mips16 simulator cannot be built using igen.  A custom mips16
-engine.c needs to be written.
-

 In mips.igen, the semantics for many of the instructions were created
 using code generated by gencode.  Those semantic segments could be
 greatly simplified.
 In mips.igen, the semantics for many of the instructions were created
 using code generated by gencode.  Those semantic segments could be
 greatly simplified.

diff --git a/sim/mips/vr.igen b/sim/mips/vr.igen
index e2118e9..042acad 100644 (file)
--- a/sim/mips/vr.igen
+++ b/sim/mips/vr.igen
@@ -337,6 +337,7 @@
 // start-sanitze-vr5400
 *vr5400:
 // end-sanitze-vr5400
 // start-sanitze-vr5400
 *vr5400:
 // end-sanitze-vr5400

+// start-sanitize-vrXXXX

 {
   SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
   GPR[RD] = High32Bits (SD_, MulAcc (SD_));
 {
   SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
   GPR[RD] = High32Bits (SD_, MulAcc (SD_));

diff --git a/sim/mips/vr4320.igen b/sim/mips/vr4320.igen
deleted file mode 100644 (file)
index c8f7611..0000000
--- a/sim/mips/vr4320.igen
+++ /dev/null
@@ -1,186 +0,0 @@
-
-
-// Integer Instructions
-// --------------------
-//
-// MulAcc is the Multiply Accumulator.
-//     This register is mapped on the the HI and LO registers.
-//     Upper 32 bits of MulAcc is mapped on to lower 32 bits of HI register.
-//     Lower 32 bits of MulAcc is mapped on to lower 32 bits of LO register.
-
-
-:function:::unsigned64:MulAcc:
-{
-  unsigned64 result = U8_4 (HI, LO);
-  return result;
-}
-
-:function:::void:SET_MulAcc:unsigned64 value
-{
-  *AL4_8 (&HI) = VH4_8 (value);
-  *AL4_8 (&LO) = VL4_8 (value);
-}
-
-:function:::signed64:SignedMultiply:signed32 l, signed32 r
-{
-  signed64 result = (signed64) l * (signed64) r;
-  return result;
-}
-
-:function:::unsigned64:UnsignedMultiply:unsigned32 l, unsigned32 r
-{
-  unsigned64 result = (unsigned64) l * (unsigned64) r;
-  return result;
-}
-
-:function:::unsigned64:Low32Bits:unsigned64 value
-{
-  unsigned64 result = (signed64) (signed32) VL4_8 (value);
-  return result;
-}
-
-:function:::unsigned64:High32Bits:unsigned64 value
-{
-  unsigned64 result = (signed64) (signed32) VH4_8 (value);
-  return result;
-}
-
-
-
-// Multiply, Accumulate
-000000,5.RS,5.RT,00000,00000,101000::::MAC
-"mac r<RS>, r<RT>"
-*vr4320:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
-}
-
-// D-Multiply, Accumulate
-000000,5.RS,5.RT,00000,00000,101001::::DMAC
-"dmac r<RS>, r<RT>"
-*vr4320:
-{
-  LO = LO + SignedMultiply (SD_, GPR[RS], GPR[RT]);
-}
-
-// Count Leading Zeros
-000000,5.RS,00000,5.RD,00000,110101::::CLZ
-"clz r<RD>, r<RS>"
-*vr4320:
-{
-  unsigned32 t = Low32Bits (SD_, GPR[RS]);
-  signed64 c = 0;
-
-  while (! (t & ( 1 << 31))
-       && c < 32)
-    {
-    c++;
-    t <<= 1;
-    }
-
-  GPR[RD] = c;
-}
-
-// D-Count Leading Zeros
-000000,5.RS,00000,5.RD,00000,111101::::DCLZ
-"dclz r<RD>, r<RS>"
-*vr4320:
-{
-  unsigned64 t = GPR[RS];
-  signed64 c = 0;
-
-  while (! (t & ( (unsigned64)1 << 63))
-       && c < 64)
-    {
-    c++;
-    t <<= 1;
-    }
-
-  printf("lo %d\n", (int) c);
-  GPR[RD] = c;
-}
-
-
-
-
-
-
-
-// Multiply and Move LO.
-000000,5.RS,5.RT,5.RD,00100,101000::::MUL
-"mul r<RD>, r<RS>, r<RT>"
-*vr4320:
-{
-  SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply and Move LO.
-000000,5.RS,5.RT,5.RD,00101,101000::::MULU
-"mulu r<RD>, r<RS>, r<RT>"
-*vr4320:
-{
-  SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
-}
-
-// Multiply and Move HI.
-000000,5.RS,5.RT,5.RD,01100,101000::::MULHI
-"mulhi r<RD>, r<RS>, r<RT>"
-*vr4320:
-{
-  SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply and Move HI.
-000000,5.RS,5.RT,5.RD,01101,101000::::MULHIU
-"mulhiu r<RD>, r<RS>, r<RT>"
-*vr4320:
-{
-  SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-}
-
-
-
-
-
-
-// Multiply, Accumulate and Move LO.
-000000,5.RS,5.RT,5.RD,00010,101000::::MACC
-"macc r<RD>, r<RS>, r<RT>"
-*vr4320:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply, Accumulate and Move LO.
-000000,5.RS,5.RT,5.RD,00011,101000::::MACCU
-"maccu r<RD>, r<RS>, r<RT>"
-*vr4320:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
-}
-
-// Multiply, Accumulate and Move HI.
-000000,5.RS,5.RT,5.RD,01010,101000::::MACCHI
-"macchi r<RD>, r<RS>, r<RT>"
-*vr4320:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply, Accumulate and Move HI.
-000000,5.RS,5.RT,5.RD,01011,101000::::MACCHIU
-"macchiu r<RD>, r<RS>, r<RT>"
-*vr4320:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-
-}
-

diff --git a/sim/mips/vr5400.igen b/sim/mips/vr5400.igen
deleted file mode 100644 (file)
index 2e77ea2..0000000
--- a/sim/mips/vr5400.igen
+++ /dev/null
@@ -1,241 +0,0 @@
-
-
-// Integer Instructions
-// --------------------
-//
-// MulAcc is the Multiply Accumulator.
-//     This register is mapped on the the HI and LO registers.
-//     Upper 32 bits of MulAcc is mapped on to lower 32 bits of HI register.
-//     Lower 32 bits of MulAcc is mapped on to lower 32 bits of LO register.
-
-
-:function:::unsigned64:MulAcc:
-{
-  unsigned64 result = U8_4 (HI, LO);
-  return result;
-}
-
-:function:::void:SET_MulAcc:unsigned64 value
-{
-  *AL4_8 (&HI) = VH4_8 (value);
-  *AL4_8 (&LO) = VL4_8 (value);
-}
-
-:function:::signed64:SignedMultiply:signed32 l, signed32 r
-{
-  signed64 result = (signed64) l * (signed64) r;
-  return result;
-}
-
-:function:::unsigned64:UnsignedMultiply:unsigned32 l, unsigned32 r
-{
-  unsigned64 result = (unsigned64) l * (unsigned64) r;
-  return result;
-}
-
-:function:::unsigned64:Low32Bits:unsigned64 value
-{
-  unsigned64 result = (signed64) (signed32) VL4_8 (value);
-  return result;
-}
-
-:function:::unsigned64:High32Bits:unsigned64 value
-{
-  unsigned64 result = (signed64) (signed32) VH4_8 (value);
-  return result;
-}
-
-
-
-// Multiply and Move LO.
-000000,5.RS,5.RT,5.RD,00001,011000::::MUL
-"mul r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply and Move LO.
-000000,5.RS,5.RT,5.RD,00001,011001::::MULU
-"mulu r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
-}
-
-// Multiply and Move HI.
-000000,5.RS,5.RT,5.RD,01001,011000::::MULHI
-"mulhi r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, 0 + SignedMultiply   (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply and Move HI.
-000000,5.RS,5.RT,5.RD,01001,011001::::MULHIU
-"mulhiu r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-}
-
-
-// Multiply, Negate and Move LO.
-000000,5.RS,5.RT,5.RD,00011,011000::::MULS
-"muls r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, 0 - SignedMultiply   (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply, Negate and Move LO.
-000000,5.RS,5.RT,5.RD,00011,011001::::MULSU
-"mulsu r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
-}
-
-// Multiply, Negate and Move HI.
-000000,5.RS,5.RT,5.RD,01011,011000::::MULSHI
-"mulshi r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, 0 - SignedMultiply   (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply, Negate and Move HI.
-000000,5.RS,5.RT,5.RD,01011,011001::::MULSHIU
-"mulshiu r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-}
-
-
-// Multiply, Accumulate and Move LO.
-000000,5.RS,5.RT,5.RD,00101,011000::::MACC
-"macc r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply, Accumulate and Move LO.
-000000,5.RS,5.RT,5.RD,00101,011001::::MACCU
-"maccu r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
-}
-
-// Multiply, Accumulate and Move HI.
-000000,5.RS,5.RT,5.RD,01101,011000::::MACCHI
-"macchi r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply, Accumulate and Move HI.
-000000,5.RS,5.RT,5.RD,01101,011001::::MACCHIU
-"macchiu r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-
-}
-
-// Multiply, Negate, Accumulate and Move LO.
-000000,5.RS,5.RT,5.RD,00111,011000::::MSAC
-"msac r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply, Negate, Accumulate and Move LO.
-000000,5.RS,5.RT,5.RD,00111,011001::::MSACU
-"msacu r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = Low32Bits  (SD_, MulAcc (SD_));
-}
-
-// Multiply, Negate, Accumulate and Move HI.
-000000,5.RS,5.RT,5.RD,01111,011000::::MSACHI
-"msachi r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-}
-
-// Unsigned Multiply, Negate, Accumulate and Move HI.
-000000,5.RS,5.RT,5.RD,01111,011001::::MSACHIU
-"msachiu r<RD>, r<RS>, r<RT>"
-*vr5400:
-{
-  SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
-  GPR[RD] = High32Bits (SD_, MulAcc (SD_));
-}
-
-
-// Rotate Right.
-000000,00001,5.RT,5.RD,5.SHIFT,000010::::ROR
-"ror r<RD>, r<RT>, <SHIFT>"
-*vr5400:
-{
-  int s = SHIFT;
-  GPR[RD] = ROTR32 (GPR[RT], s);
-}
-
-// Rotate Right Variable.
-000000,5.RS,5.RT,5.RD,00001,000110::::RORV
-"rorv r<RD>, r<RT>, <RS>"
-*vr5400:
-{
-  int s = MASKED (GPR[RS], 4, 0);
-  GPR[RD] = ROTR32 (GPR[RT], s);
-}
-
-// Double Rotate Right.
-000000,00001,5.RT,5.RD,5.SHIFT,111010::::DROR
-"dror r<RD>, r<RT>, <SHIFT>"
-*vr5400:
-{
-  int s = SHIFT;
-  GPR[RD] = ROTR64 (GPR[RT], s);
-}
-
-// Double Rotate Right Plus 32.
-000000,00001,5.RT,5.RD,5.SHIFT,111110::::DROR32
-"dror32 r<RD>, r<RT>, <SHIFT>"
-*vr5400:
-{
-  int s = SHIFT + 32;
-  GPR[RD] = ROTR64 (GPR[RT], s);
-}
-
-// Double Rotate Right Variable.
-000000,5.RS,5.RT,5.RD,00001,010110::::DRORV
-"drorv r<RD>, r<RT>, <RS>"
-*vr5400:
-{
-  int s = MASKED (GPR[RS], 5, 0);
-  GPR[RD] = ROTR64 (GPR[RT], s);
-}