Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
- /* Set the AC Bias Period and Number of Transisitons per Interrupt */
+ /* Set the AC Bias Period and Number of Transitions per Interrupt */
reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2) & 0xFFF00000;
reg |= LCD_AC_BIAS_FREQUENCY(period) |
LCD_AC_BIAS_TRANSITIONS_PER_INT(transitions_per_int);
reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2) & 0xFFF00000;
reg |= LCD_AC_BIAS_FREQUENCY(period) |
LCD_AC_BIAS_TRANSITIONS_PER_INT(transitions_per_int);
/* Pixels per line = (PPL + 1)*16 */
if (lcd_revision == LCD_VERSION_1) {
/*
/* Pixels per line = (PPL + 1)*16 */
if (lcd_revision == LCD_VERSION_1) {
/*
- * 0x3F in bits 4..9 gives max horisontal resolution = 1024
+ * 0x3F in bits 4..9 gives max horizontal resolution = 1024
* pixels
*/
width &= 0x3f0;
* pixels
*/
width &= 0x3f0;
lcd_cfg_vertical_sync(panel->vbp, panel->vsw, panel->vfp);
lcd_cfg_horizontal_sync(panel->hbp, panel->hsw, panel->hfp);
lcd_cfg_vertical_sync(panel->vbp, panel->vsw, panel->vfp);
lcd_cfg_horizontal_sync(panel->hbp, panel->hsw, panel->hfp);
- /* Configure for disply */
+ /* Configure for display */
ret = lcd_cfg_display(cfg);
if (ret < 0)
return ret;
ret = lcd_cfg_display(cfg);
if (ret < 0)
return ret;
lcdc_write(stat, &da8xx_fb_reg_base->stat);
lcdc_write(stat, &da8xx_fb_reg_base->stat);
- /* Disable PL completion inerrupt */
+ /* Disable PL completion interrupt */
reg_ras = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
reg_ras &= ~LCD_V1_PL_INT_ENA;
lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl);
reg_ras = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
reg_ras &= ~LCD_V1_PL_INT_ENA;
lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl);
lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);
lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);
- /* Disable PL completion inerrupt */
+ /* Disable PL completion interrupt */
reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_clr) |
(LCD_V2_PL_INT_ENA);
lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_clr);
reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_clr) |
(LCD_V2_PL_INT_ENA);
lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_clr);