Setting up the delay only needs to be done once; move it to
rcar_i2c_set_speed so it's done at initialization time.
Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
writel(0, priv->base + RCAR_I2C_ICMSR);
writel(priv->icccr, priv->base + RCAR_I2C_ICCCR);
writel(0, priv->base + RCAR_I2C_ICMSR);
writel(priv->icccr, priv->base + RCAR_I2C_ICCCR);
- if (priv->type == RCAR_I2C_TYPE_GEN3)
- writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR);
-
ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMCR,
RCAR_I2C_ICMCR_FSDA, false, 2, true);
if (ret) {
ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMCR,
RCAR_I2C_ICMCR_FSDA, false, 2, true);
if (ret) {
priv->icccr = (scgd << RCAR_I2C_ICCCR_SCGD_OFF) | cdf;
writel(priv->icccr, priv->base + RCAR_I2C_ICCCR);
priv->icccr = (scgd << RCAR_I2C_ICCCR_SCGD_OFF) | cdf;
writel(priv->icccr, priv->base + RCAR_I2C_ICCCR);
+ if (priv->type == RCAR_I2C_TYPE_GEN3) {
+ /* Set SCL/SDA delay */
+ writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR);
+ }
+