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clk: rk3288: add PWM clock get rate
author
Kever Yang
<kever.yang@rock-chips.com>
Fri, 12 Aug 2016 09:57:05 +0000
(17:57 +0800)
committer
Simon Glass
<sjg@chromium.org>
Thu, 22 Sep 2016 13:57:02 +0000
(07:57 -0600)
This patch add clk_get_rate for PWM device.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
drivers/clk/rockchip/clk_rk3288.c
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diff --git
a/drivers/clk/rockchip/clk_rk3288.c
b/drivers/clk/rockchip/clk_rk3288.c
index
c07203d
..
bd71a96
100644
(file)
--- a/
drivers/clk/rockchip/clk_rk3288.c
+++ b/
drivers/clk/rockchip/clk_rk3288.c
@@
-695,6
+695,8
@@
static ulong rk3288_clk_get_rate(struct clk *clk)
case PCLK_I2C4:
case PCLK_I2C5:
return gclk_rate;
case PCLK_I2C4:
case PCLK_I2C5:
return gclk_rate;
+ case PCLK_PWM:
+ return PD_BUS_PCLK_HZ;
default:
return -ENOENT;
}
default:
return -ENOENT;
}