sim/erc32/ChangeLog:

2013-10-09  Sergio Durigan Junior  <sergiodj@redhat.com>

	PR sim/16018:
	* float.c (set_fsr): Add missing "break" statements.  Reindent
	code.

diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog
index 4fff0da..d7266fd 100644 (file)
--- a/sim/erc32/ChangeLog
+++ b/sim/erc32/ChangeLog
@@ -1,3 +1,9 @@
+2013-10-09  Sergio Durigan Junior  <sergiodj@redhat.com>
+
+       PR sim/16018:
+       * float.c (set_fsr): Add missing "break" statements.  Reindent
+       code.
+

 2013-09-23  Alan Modra  <amodra@gmail.com>
 
        * configure: Regenerate.
 2013-09-23  Alan Modra  <amodra@gmail.com>
 
        * configure: Regenerate.

diff --git a/sim/erc32/float.c b/sim/erc32/float.c
index c1a46f8..1b8f0fc 100644 (file)
--- a/sim/erc32/float.c
+++ b/sim/erc32/float.c
@@ -91,9 +91,16 @@ uint32 fsr;
      fsr >>= 30;
      switch (fsr) {
        case 0: 
      fsr >>= 30;
      switch (fsr) {
        case 0: 

-       case 2: break;
-       case 1: fsr = 3;
-       case 3: fsr = 1;
+       case 2:
+         break;
+
+       case 1:
+         fsr = 3;
+         break;
+
+       case 3:
+         fsr = 1;
+         break;

      }
      rawfsr = _get_cw();
      rawfsr |= (fsr << 10) | 0x3ff;
      }
      rawfsr = _get_cw();
      rawfsr |= (fsr << 10) | 0x3ff;