* elf32-msp430.c (msp430_final_link_relocate): Fix comments. Fix
REL loads to match RELA stores.
+2015-06-25 DJ Delorie <dj@redhat.com>
+
+ * elf32-msp430.c (msp430_final_link_relocate): Fix comments. Fix
+ REL loads to match RELA stores.
+
2015-06-25 H.J. Lu <hongjiu.lu@intel.com>
* elf.c (_bfd_elf_compute_section_file_positions): Don't
2015-06-25 H.J. Lu <hongjiu.lu@intel.com>
* elf.c (_bfd_elf_compute_section_file_positions): Don't
break;
case R_MSP430X_PCR20_EXT_ODST:
break;
case R_MSP430X_PCR20_EXT_ODST:
- /* [0,4]+[48,16] = ---F ---- FFFF */
+ /* [0,4]+[48,16] = ---F ---- ---- FFFF */
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
- addend |= bfd_get_16 (input_bfd, contents+4);
+ addend |= bfd_get_16 (input_bfd, contents + 6);
break;
case R_MSP430X_ABS20_EXT_SRC:
break;
case R_MSP430X_ABS20_EXT_SRC:
- /* [7,4]+[32,16] = -78- FFFF */
+ /* [7,4]+[32,16] = -78- ---- FFFF */
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0x0780) << 9;
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0x0780) << 9;
- addend |= bfd_get_16 (input_bfd, contents+2);
+ addend |= bfd_get_16 (input_bfd, contents + 4);
break;
case R_MSP430X_PCR20_EXT_DST:
break;
case R_MSP430X_PCR20_EXT_DST:
- /* [0,4]+[32,16] = ---F FFFF */
+ /* [0,4]+[32,16] = ---F ---- FFFF */
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
- addend |= bfd_get_16 (input_bfd, contents+2);
+ addend |= bfd_get_16 (input_bfd, contents + 4);
break;
case R_MSP430X_PCR20_EXT_SRC:
break;
case R_MSP430X_PCR20_EXT_SRC:
- /* [7,4]+32,16] = -78- FFFF */
+ /* [7,4]+[32,16] = -78- ---- FFFF */
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = ((bfd_get_16 (input_bfd, contents) & 0x0780) << 9);
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = ((bfd_get_16 (input_bfd, contents) & 0x0780) << 9);
- addend |= bfd_get_16 (input_bfd, contents+2);
+ addend |= bfd_get_16 (input_bfd, contents + 4);
break;
case R_MSP430X_ABS20_EXT_DST:
break;
case R_MSP430X_ABS20_EXT_DST:
+ /* [0,4]+[32,16] = ---F ---- FFFF */
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
- srel += bfd_get_16 (input_bfd, contents) & 0xf;
+ {
+ bfd_vma addend;
+ addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
+ addend |= bfd_get_16 (input_bfd, contents + 4);
+ srel += addend;
+ }
else
srel += rel->r_addend;
bfd_put_16 (input_bfd, (srel & 0xffff), contents + 4);
else
srel += rel->r_addend;
bfd_put_16 (input_bfd, (srel & 0xffff), contents + 4);
break;
case R_MSP430X_ABS20_EXT_ODST:
break;
case R_MSP430X_ABS20_EXT_ODST:
- /* [0,4]+[48,16] = ---F ---- FFFF */
+ /* [0,4]+[48,16] = ---F ---- ---- FFFF */
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
- addend |= bfd_get_16 (input_bfd, contents+4);
+ addend |= bfd_get_16 (input_bfd, contents + 6);
break;
case R_MSP430X_ABS20_ADR_SRC:
break;
case R_MSP430X_ABS20_ADR_SRC:
- /* [8,4]+[32,16] = -F-- FFFF */
+ /* [8,4]+[16,16] = -F-- FFFF */
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
bfd_vma addend;
addend = ((bfd_get_16 (input_bfd, contents) & 0xf00) << 8);
bfd_vma addend;
addend = ((bfd_get_16 (input_bfd, contents) & 0xf00) << 8);
- addend |= bfd_get_16 (input_bfd, contents+2);
+ addend |= bfd_get_16 (input_bfd, contents + 2);
break;
case R_MSP430X_ABS20_ADR_DST:
break;
case R_MSP430X_ABS20_ADR_DST:
- /* [0,4]+[32,16] = ---F FFFF */
+ /* [0,4]+[16,16] = ---F FFFF */
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = ((bfd_get_16 (input_bfd, contents) & 0xf) << 16);
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = ((bfd_get_16 (input_bfd, contents) & 0xf) << 16);
- addend |= bfd_get_16 (input_bfd, contents+2);
+ addend |= bfd_get_16 (input_bfd, contents + 2);
break;
case R_MSP430X_PCR20_CALL:
break;
case R_MSP430X_PCR20_CALL:
- /* [0,4]+[32,16] = ---F FFFF*/
+ /* [0,4]+[16,16] = ---F FFFF*/
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
if (is_rel_reloc)
{
bfd_vma addend;
addend = (bfd_get_16 (input_bfd, contents) & 0xf) << 16;
- addend |= bfd_get_16 (input_bfd, contents+2);
+ addend |= bfd_get_16 (input_bfd, contents + 2);