(pseudo_func): Add @iplt.
(pseudo_opcode): Add data16 and data16.ua.
(md_begin): Set iplt pseudo.
(ia64_cons_fix_new): Handle 16 byte iplt reloc specially.
-2001-08-04 Richard Henderson <rth@redhat.com>
+2001-09-05 Richard Henderson <rth@redhat.com>
+
+ * config/tc-ia64.c (FUNC_IPLT_RELOC): New.
+ (pseudo_func): Add @iplt.
+ (pseudo_opcode): Add data16 and data16.ua.
+ (md_begin): Set iplt pseudo.
+ (ia64_cons_fix_new): Handle 16 byte iplt reloc specially.
+
+2001-09-04 Richard Henderson <rth@redhat.com>
* config/tc-alpha.c (struct alpha_insn): Make sequence scalar long.
(MACRO_LITERAL, MACRO_BASE, MACRO_BYTOFF, MACRO_JSR): Remove.
* config/tc-alpha.c (struct alpha_insn): Make sequence scalar long.
(MACRO_LITERAL, MACRO_BASE, MACRO_BYTOFF, MACRO_JSR): Remove.
FUNC_SEG_RELATIVE,
FUNC_LTV_RELATIVE,
FUNC_LT_FPTR_RELATIVE,
FUNC_SEG_RELATIVE,
FUNC_LTV_RELATIVE,
FUNC_LT_FPTR_RELATIVE,
{ "segrel", PSEUDO_FUNC_RELOC, { 0 } },
{ "ltv", PSEUDO_FUNC_RELOC, { 0 } },
{ "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
{ "segrel", PSEUDO_FUNC_RELOC, { 0 } },
{ "ltv", PSEUDO_FUNC_RELOC, { 0 } },
{ "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
+ { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
/* mbtype4 constants: */
{ "alt", PSEUDO_FUNC_CONST, { 0xa } },
/* mbtype4 constants: */
{ "alt", PSEUDO_FUNC_CONST, { 0xa } },
{ "data2", cons, 2 },
{ "data4", cons, 4 },
{ "data8", cons, 8 },
{ "data2", cons, 2 },
{ "data4", cons, 4 },
{ "data8", cons, 8 },
+ { "data16", cons, 16 },
{ "real4", stmt_float_cons, 'f' },
{ "real8", stmt_float_cons, 'd' },
{ "real10", stmt_float_cons, 'x' },
{ "real4", stmt_float_cons, 'f' },
{ "real8", stmt_float_cons, 'd' },
{ "real10", stmt_float_cons, 'x' },
{ "data2.ua", stmt_cons_ua, 2 },
{ "data4.ua", stmt_cons_ua, 4 },
{ "data8.ua", stmt_cons_ua, 8 },
{ "data2.ua", stmt_cons_ua, 2 },
{ "data4.ua", stmt_cons_ua, 4 },
{ "data8.ua", stmt_cons_ua, 8 },
+ { "data16.ua", stmt_cons_ua, 16 },
{ "real4.ua", float_cons, 'f' },
{ "real8.ua", float_cons, 'd' },
{ "real10.ua", float_cons, 'x' },
{ "real4.ua", float_cons, 'f' },
{ "real8.ua", float_cons, 'd' },
{ "real10.ua", float_cons, 'x' },
symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
&zero_address_frag);
symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
&zero_address_frag);
+ pseudo_func[FUNC_IPLT_RELOC].u.sym =
+ symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
+ &zero_address_frag);
+
/* Compute the table of best templates. We compute goodness as a
base 4 value, in which each match counts for 3, each F counts
for 2, each B counts for 1. This should maximize the number of
/* Compute the table of best templates. We compute goodness as a
base 4 value, in which each match counts for 3, each F counts
for 2, each B counts for 1. This should maximize the number of
code = BFD_RELOC_IA64_DIR64LSB;
break;
code = BFD_RELOC_IA64_DIR64LSB;
break;
+ case 16:
+ if (exp->X_op == O_pseudo_fixup
+ && exp->X_op_symbol
+ && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
+ {
+ if (target_big_endian)
+ code = BFD_RELOC_IA64_IPLTMSB;
+ else
+ code = BFD_RELOC_IA64_IPLTLSB;
+
+ exp->X_op = O_symbol;
+ break;
+ }
+ /* FALLTHRU */
+
default:
as_bad ("Unsupported fixup size %d", nbytes);
ignore_rest_of_line ();
default:
as_bad ("Unsupported fixup size %d", nbytes);
ignore_rest_of_line ();
exp->X_op = O_symbol;
code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
}
exp->X_op = O_symbol;
code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
}
fix = fix_new_exp (f, where, nbytes, exp, 0, code);
/* We need to store the byte order in effect in case we're going
to fix an 8 or 16 bit relocation (for which there no real
fix = fix_new_exp (f, where, nbytes, exp, 0, code);
/* We need to store the byte order in effect in case we're going
to fix an 8 or 16 bit relocation (for which there no real