The control register for ADC L2 and R2 is RT5659_PWR_DIG_1
not RT5659_PWR_DIG_2.
Signed-off-by: Zhong An <zhongan@pinecone.net>
Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_2,
+ SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1,
RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_2,
+ SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1,
RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),