ppc/85xx: Disable all async interrupt sources when we boot

We should make sure to clear MSR[ME, CE, DE] when we boot an OS image
since we have changed the exception vectors and the OSes vectors might
not be setup we should avoid async interrupts at all costs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 48a82ed..a6d1e99 100644 (file)
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -364,5 +364,16 @@ extern void setup_ivors(void);
 
 void arch_preboot_os(void)
 {
 
 void arch_preboot_os(void)
 {

+       u32 msr;
+
+       /*
+        * We are changing interrupt offsets and are about to boot the OS so
+        * we need to make sure we disable all async interrupts. EE is already
+        * disabled by the time we get called.
+        */
+       msr = mfmsr();
+       msr &= ~(MSR_ME|MSR_CE|MSR_DE);
+       mtmsr(msr);
+

        setup_ivors();
 }
        setup_ivors();
 }