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(parent: 93bbef1) | patch
clk: starfive: jh7110-sys: Set PLL0 rate to 1.5GHz 21/297421/1
authorJaehoon Chung <jh80.chung@samsung.com>
Fri, 18 Aug 2023 04:19:55 +0000 (13:19 +0900)
committerJaehoon Chung <jh80.chung@samsung.com>
Fri, 18 Aug 2023 04:21:57 +0000 (13:21 +0900)
commit3e0e031f1d54b3f7b792f9c48aeb3ee3a8ca60ce
tree354d855576c9bdb6b0c569652026a5f031e149dbtree | snapshot
parent93bbef15eb5096b416b130444f6383e353dbd00fcommit | diff
clk: starfive: jh7110-sys: Set PLL0 rate to 1.5GHz

Set PLL0 rate to 1.5GHz. Change the parent of cpu_root clock
and the divider of cpu_core before setting.

This patch is taken from patch that was posted on mailing.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Change-Id: Ib418a6321555c045effcb0580e0c91d80a7a2043
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
drivers/clk/starfive/clk-starfive-jh7110-sys.c diff | blob | history
Domain: System / Kernel;