[SystemZ] Model access registers as LLVM registers
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 8 Nov 2016 20:15:26 +0000 (20:15 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 8 Nov 2016 20:15:26 +0000 (20:15 +0000)
commitfffc7110d65564c2ecaa705913f69db21fa9981e
treea7e5832c7452b0d4b65cb5502650893b5026a3f1
parent9c5a69d2ac4d205b39dc8041922ba9fdd90198f1
[SystemZ] Model access registers as LLVM registers

Add the 16 access registers as LLVM registers.  This allows removing
a lot of special cases in the assembler and disassembler where we
were handling access registers; this can all just use the generic
register code now.

Also add a bunch of instructions to operate on access registers,
for assembler/disassembler use only.  No change in code generation
intended.

llvm-svn: 286283
22 files changed:
llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
llvm/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.cpp
llvm/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/lib/Target/SystemZ/SystemZISelLowering.h
llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
llvm/lib/Target/SystemZ/SystemZInstrInfo.td
llvm/lib/Target/SystemZ/SystemZOperands.td
llvm/lib/Target/SystemZ/SystemZOperators.td
llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
llvm/lib/Target/SystemZ/SystemZRegisterInfo.td
llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
llvm/lib/Target/SystemZ/SystemZScheduleZ196.td
llvm/lib/Target/SystemZ/SystemZScheduleZEC12.td
llvm/test/MC/Disassembler/SystemZ/insns.txt
llvm/test/MC/SystemZ/insn-bad.s
llvm/test/MC/SystemZ/insn-good.s
llvm/test/MC/SystemZ/regs-bad.s
llvm/test/MC/SystemZ/regs-good.s