drm/amd/display: Add support for USB4 on C20 PHY for DCN3.1
authorAhmad Othman <ahmad.Othman@amd.com>
Wed, 6 Oct 2021 01:04:03 +0000 (21:04 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 28 Oct 2021 18:26:14 +0000 (14:26 -0400)
commitffd89aa968d9046ab5fb9f7cdb7f8d3c383a15c1
tree8da97c3b5d644d833336aac47d7bcd7182340107
parente5dfcd272722fe3948837e7f1ca7aafb471037b1
drm/amd/display: Add support for USB4 on C20 PHY for DCN3.1

[Why]
Created new fields that matches new B0 structs On DCN31 the mapping of
DIO output to PHY differs from A0 to B0 boards with new PHY C20 & this
new mapping needed to be handled.

[How]
Mapped new structure based on new structs Added logic for mapping over
A0 and B0 boards Hooked all new structs together.

Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Agustin Gutierrez <agustin.gutierrez@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Ahmad Othman <Ahmad.Othman@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link.c
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dm_cp_psp.h
drivers/gpu/drm/amd/display/modules/inc/mod_hdcp.h