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(parent: 6880fa6) | patch
ARM: dts: ux500: Tag Janice display SPI correct
authorLinus Walleij <linus.walleij@linaro.org>
Fri, 11 Jun 2021 13:01:59 +0000 (15:01 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 14 Sep 2021 16:28:41 +0000 (18:28 +0200)
commitffc011b696f0c0e4cd8c991d09a6140e6b866865
tree9c1840df5c69b64c64d02574def7773e4445b369tree | snapshot
parent6880fa6c56601bb8ed59df6c30fd390cc5f6dd8fcommit | diff
ARM: dts: ux500: Tag Janice display SPI correct

The s6e63m0 display used "type 3" SPI communication so
flag the device as using negative clocking and polarity
on the SPI bus.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/ste-ux500-samsung-janice.dts diff | blob | history
Domain: System / Kernel;