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iio: gyro: adis16130: Fix alignment for DMA safety
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 8 May 2022 17:56:53 +0000 (18:56 +0100)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Tue, 14 Jun 2022 10:53:18 +0000 (11:53 +0100)
commitff3211b2ba9afac80ceb795d148831dd879b30b7
treee855d1fcbe4d6214b65f80ad7e8f1ab67e76e7a5tree | snapshot
parentae6eeb534924ecc2afd5a394964fd6de0ca54d39commit | diff
iio: gyro: adis16130: Fix alignment for DMA safety

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 8e67875141b2 ("staging:iio:gyro: adis16130 cleanup, move to abi and bug fixes.")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-74-jic23@kernel.org
drivers/iio/gyro/adis16130.c diff | blob | history
Domain: System / Kernel;