[Xtensa 10/10] Add relaxations and fixups. Add rest part of Xtensa Core Instructions
authorAndrei Safronov <andrei.safronov@espressif.com>
Mon, 26 Dec 2022 11:00:00 +0000 (12:00 +0100)
committerstefan.stipanovic <stefan.stipanovic@espressif.com>
Mon, 26 Dec 2022 12:30:51 +0000 (13:30 +0100)
commitff25800d4ba0b577a44dc918da7a1fb3c29fdb13
treeea41f64731d6204e19cb919ccc11b872394ad317
parent71199af14c578a72a5c0fec6ecaa5eab1645a7b7
[Xtensa 10/10] Add relaxations and fixups. Add rest part of Xtensa Core Instructions

Add branch/jump/call/l32r instructions and fixups support. Add R_XTENSA_32/R_XTENSA_SLOT0_OP
relocations in object files generation. Modify tests to support new instructions.
Add tests for relocations and fixups.

Differential Revision: https://reviews.llvm.org/D64836
19 files changed:
llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/CMakeLists.txt
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaELFObjectWriter.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaFixupKinds.h [new file with mode: 0644]
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.cpp [new file with mode: 0644]
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCExpr.h [new file with mode: 0644]
llvm/lib/Target/Xtensa/XtensaInstrInfo.td
llvm/lib/Target/Xtensa/XtensaOperands.td
llvm/test/MC/Xtensa/Core/branch.s [new file with mode: 0644]
llvm/test/MC/Xtensa/Core/call-jump.s [new file with mode: 0644]
llvm/test/MC/Xtensa/Core/invalid.s
llvm/test/MC/Xtensa/Relocations/fixups-diagnostics.s [new file with mode: 0644]
llvm/test/MC/Xtensa/Relocations/fixups.s [new file with mode: 0644]
llvm/test/MC/Xtensa/Relocations/relocations.s [new file with mode: 0644]