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(parent: 419e505) | patch
drm/i915/reg: fix QGV points register access offsets
authorVinod Govindapillai <vinod.govindapillai@intel.com>
Thu, 23 Mar 2023 11:44:25 +0000 (13:44 +0200)
committerStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Mon, 27 Mar 2023 12:58:28 +0000 (15:58 +0300)
commitff168b37a96736c892007730e703e74d5a23ca48
treeabb74e94639aaeb01a22997369582988b36a360dtree | snapshot
parent419e505dab203b85facc782ec34d2d98601644ffcommit | diff
drm/i915/reg: fix QGV points register access offsets

Wrong offsets are calculated to read QGV point registers. Fix it
to read from the correct registers.

Bspec: 64602

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323114426.41136-2-vinod.govindapillai@intel.com
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
Domain: System / Kernel;