ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid XU3 family
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 10 Dec 2020 21:29:00 +0000 (22:29 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 4 Mar 2021 10:37:21 +0000 (11:37 +0100)
commitff11ece44c2db61dda845cca48ce2bd7580b16cf
treec5d7d0fe63e37d19914db04af5a9c637baf59009
parent42596469a889f7ca46d5604dfbe77e483081152f
ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid XU3 family

[ Upstream commit 3e7d9a583a24f7582c6bc29a0d4d624feedbc2f9 ]

The Samsung PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  The falling edge
interrupt will mostly work but it's not correct.

Fixes: aac4e0615341 ("ARM: dts: odroidxu3: Enable wake alarm of S2MPS11 RTC")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20201210212903.216728-6-krzk@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm/boot/dts/exynos5422-odroid-core.dtsi