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rockchip: rk3288: grf: Fix shift for RK3288_TXCLK_DLY_ENA_GMAC_ENABLE
authorRomain Perier <romain.perier@collabora.com>
Fri, 2 Jun 2017 09:19:43 +0000 (11:19 +0200)
committerSimon Glass <sjg@chromium.org>
Thu, 8 Jun 2017 03:30:48 +0000 (21:30 -0600)
commitfefe9d06bd0917739822a4be4c702f1d5d0e0899
tree8a91be7ed4a303cc512eebbdffd026f45a946025tree | snapshot
parentcf35242a3e6e15c36150c132b3da8032fa21f91bcommit | diff
rockchip: rk3288: grf: Fix shift for RK3288_TXCLK_DLY_ENA_GMAC_ENABLE

RK3288_TXCLK_DLY_ENA_GMAC_ENABLE, in GRF_SOC_CON3, is supposed to be bit
0xe and not 0xf. Otherwise, it is RGMII RX clock delayline enable and
introduces random delays and data lose.

This commit fixes the issue by replacing RK3288_TXCLK_DLY_ENA_GMAC_ENABLE
with the right shift.

Signed-off-by: Romain Perier <romain.perier@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/arm/include/asm/arch-rockchip/grf_rk3288.h diff | blob | history
Domain: System / Kernel;