PCI/P2PDMA: Add Intel 3rd Gen Intel Xeon Scalable Processors to whitelist
authorMichael J. Ruhl <michael.j.ruhl@intel.com>
Wed, 9 Feb 2022 16:28:01 +0000 (11:28 -0500)
committerBjorn Helgaas <bhelgaas@google.com>
Fri, 25 Feb 2022 17:03:30 +0000 (11:03 -0600)
commitfeaea1fe8b36b2e5b12b2f9e6e050db28dfee789
tree38a42e3bf52076a438216dfbe50287fccb10a092
parente783362eb54cd99b2cac8b3a9aeac942e6f6ac07
PCI/P2PDMA: Add Intel 3rd Gen Intel Xeon Scalable Processors to whitelist

In order to do P2P communication the bridge ID of the platform must be in
the P2P device table.

Update the P2P device table with a device ID for the 3rd Gen Intel Xeon
Scalable Processors.

Link: https://lore.kernel.org/r/20220209162801.7647-1-michael.j.ruhl@intel.com
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
drivers/pci/p2pdma.c