MIPS: smp-cps: Don't rely on CP0_CMGCRBASE
authorJiaxun Yang <jiaxun.yang@flygoat.com>
Mon, 27 Feb 2023 18:46:13 +0000 (18:46 +0000)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Mon, 27 Feb 2023 22:44:57 +0000 (23:44 +0100)
commitfea8826d5fdc4ff5c93e883a738597129614039c
treea4427ea43c2031f51e2d7a14ad912bfb3399f55a
parentdd8314739a1ff8ed081d3a06f5f87045f7384636
MIPS: smp-cps: Don't rely on CP0_CMGCRBASE

CP0_CMGCRBASE is not always available on CPS enabled system
such as early proAptiv.

For early SMP bring up where we can't safely access memeory,
we patch the entry of CPS NMI vector to inject CMGCR address
directly into register during early core bringup.

For VPE bringup as the core is already coherenct at that point
we just read the variable to obtain the address.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/include/asm/smp-cps.h
arch/mips/kernel/cps-vec.S
arch/mips/kernel/smp-cps.c