[AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as *having* side effects.
authorChad Rosier <mcrosier@codeaurora.org>
Tue, 21 Nov 2017 18:08:34 +0000 (18:08 +0000)
committerChad Rosier <mcrosier@codeaurora.org>
Tue, 21 Nov 2017 18:08:34 +0000 (18:08 +0000)
commitfe97d7367411227427d307e897989c19961826e7
tree11d5b4542529edcb15b759a9528428ac2a1199c3
parent70e22d121d435276aeddb38764d4f72c3985c3bd
[AArch64] Mark mrs of TPIDR_EL0 (thread pointer) as *having* side effects.

This partially reverts r298851.  The the underlying issue is that we don't
currently model the dependency between mrs (read system register) and
msr (write system register) instructions.

Something like the below should never be reordered:

 msr TPIDR_EL0, x0  ;; set thread pointer
 mrs x8, TPIDR_EL0  ;; read thread pointer

but was being reordered after r298851.  The functional part of the patch
that wasn't reverted needed to remain in place in order to not break
r299462.

PR35317

llvm-svn: 318788
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/test/CodeGen/AArch64/thread-pointer.ll [deleted file]