AMDGPU: Fix folding reg_sequence into copy to phys reg
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 11 Apr 2017 22:29:19 +0000 (22:29 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Tue, 11 Apr 2017 22:29:19 +0000 (22:29 +0000)
commitfe78ffba92c01a1138e12746d3fc74dfd17e01a8
tree343810f8413bdaea9036ab6c5fe5324e50bbae89
parent978b1667d2d26732d85bf5c92bec3a3961ff45aa
AMDGPU: Fix folding reg_sequence into copy to phys reg

This was producing an illegal reg_sequence defining
a physical register with virtual register inputs.

llvm-svn: 299997
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
llvm/test/CodeGen/AMDGPU/inline-asm.ll