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arm64: dts: renesas: rzg2lc-smarc-som: Add PHY interrupt support for ETH0
authorBiju Das <biju.das.jz@bp.renesas.com>
Wed, 12 Jul 2023 15:11:53 +0000 (16:11 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 25 Jul 2023 09:41:09 +0000 (11:41 +0200)
commitfe7297bf011bf6910d76010ba1763daf1286cbf4
treed8e6809b462b9716ac082313b92e78f27495739ctree | snapshot
parent7a98d75c4a63a90e81178170b748512e7a23417dcommit | diff
arm64: dts: renesas: rzg2lc-smarc-som: Add PHY interrupt support for ETH0

The PHY interrupt (INT_N) pin is connected to IRQ0 for ETH0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230712151153.81965-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi diff | blob | history
Domain: System / Kernel;