[AMDGPU] Rename SIInsertSkips Pass
authorCarl Ritson <carl.ritson@amd.com>
Sat, 20 Mar 2021 02:27:52 +0000 (11:27 +0900)
committerCarl Ritson <carl.ritson@amd.com>
Sat, 20 Mar 2021 02:48:04 +0000 (11:48 +0900)
commitfe5f4c397f029b66a541b25d4749496785f2d4f5
tree1910d100a6f59e468900f0593f40a2192e766c3a
parent5df2af8b0ef33f48b1ee72bcd27bc609b898da52
[AMDGPU] Rename SIInsertSkips Pass

Pass no longer handles skips.  Pass now removes unnecessary
unconditional branches and lowers early termination branches.
Hence rename to SILateBranchLowering.

Move code to handle returns to epilog from SIPreEmitPeephole
into SILateBranchLowering. This means SIPreEmitPeephole only
contains optional optimisations, and all required transforms
are in SILateBranchLowering.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D98915
llvm/lib/Target/AMDGPU/AMDGPU.h
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/lib/Target/AMDGPU/CMakeLists.txt
llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp [moved from llvm/lib/Target/AMDGPU/SIInsertSkips.cpp with 60% similarity]
llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
llvm/test/CodeGen/AMDGPU/early-term.mir
llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
llvm/test/CodeGen/AMDGPU/readlane_exec0.mir
llvm/test/CodeGen/AMDGPU/shrink-carry.mir
llvm/test/CodeGen/AMDGPU/syncscopes.ll
llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn