intel/fs/xe2+: Fix calculation of spill message width for Xe2 regs.
authorFrancisco Jerez <currojerez@riseup.net>
Tue, 11 Oct 2022 01:05:13 +0000 (18:05 -0700)
committerJordan Justen <jordan.l.justen@intel.com>
Thu, 21 Sep 2023 00:19:36 +0000 (17:19 -0700)
commitfe3d90aedff8ef5cd7dc94c0d3c21c8352631d28
treea27ff6f2d0991b9cf66341973f5a967d676c7efd
parent791d0401047fc899309e0f44f245c33884decfeb
intel/fs/xe2+: Fix calculation of spill message width for Xe2 regs.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25020>
src/intel/compiler/brw_fs_reg_allocate.cpp