drm/i915/psr: Fix BDW PSR AUX CH data register offsets
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 9 Jun 2023 14:13:53 +0000 (17:13 +0300)
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>
Tue, 4 Jul 2023 09:40:21 +0000 (10:40 +0100)
commitfdffb7dbc74f48cb1d404d9ab0c9fd769a59caf0
treef333a505fad4bfdacdd03f41aca80c2cc5b708bc
parent5b7826355e5b9f48eea29275215fc55165cd17c3
drm/i915/psr: Fix BDW PSR AUX CH data register offsets

The multiplication got replaced by an addition in some cleanup.
This means we never write the correct data to some of the BDW
PSR data registers and thus we fail to actually wake up the
panel from PSR.

Fixes: 4ab4fa103217 ("drm/i915/psr: Make PSR registers relative to transcoders")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230609141404.12729-3-ville.syrjala@linux.intel.com
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
(cherry picked from commit 460dc4ba1442b3e5e543328d11db2702b98d3d7c)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
drivers/gpu/drm/i915/display/intel_psr_regs.h