Add missing barrier to HOST in memory_barrier test
authorSlawomir Cygan <slawomir.cygan@intel.com>
Thu, 7 May 2020 15:47:08 +0000 (17:47 +0200)
committerAlexander Galazin <Alexander.Galazin@arm.com>
Thu, 14 May 2020 15:12:57 +0000 (11:12 -0400)
commitfddbbe5f018affa87a4cb925f7a1627298cc2ebf
tree1d6ad8c4313682062b192b743f287fbd8ca4d97c
parentfc9f58142d09c2a796a4134d3eb496f69aa35bb8
Add missing barrier to HOST in memory_barrier test

The test was lacking a barrier between device write access and
validation of the data on host.

Components: Vulkan

VK-GL-CTS Issue: 2359

Affects: dEQP-VK.memory_model.message_passing.*

Change-Id: Ia75277aaa2c7e25bff807cd3c6ebe14513403bfc
external/vulkancts/modules/vulkan/memory_model/vktMemoryModelMessagePassing.cpp