mips: fix erros on registers macros of pll-ddr-config1-nfrac for QCA956X
authorRosy Song <rosysong@rosinson.com>
Sat, 16 Mar 2019 01:24:37 +0000 (09:24 +0800)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Fri, 12 Apr 2019 15:32:50 +0000 (17:32 +0200)
commitfda1bb057441a8ec1b0f52e24933694ddd78cef4
tree4f6ce86bd0f5bb8ccc7482cafc8f1859f5256665
parente4f907e968a754fd1180c364c90ba2a4a0398d7e
mips: fix erros on registers macros of pll-ddr-config1-nfrac for QCA956X

See details in chapter 8.6.2 and 8.6.4 (page 140-141) of qca9563 datasheet,

   NFRAC[17:0]

So the mask of [17:5] is 0x1fff not 0x3fff.

Signed-off-by: Rosy Song <rosysong@rosinson.com>
Changes for v2-v3:
   - add more information for this commit

Changes for v4-v5:
   - coding style cleanup
arch/mips/mach-ath79/include/mach/ar71xx_regs.h