counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update
authorFabrice Gasnier <fabrice.gasnier@foss.st.com>
Wed, 23 Nov 2022 13:36:09 +0000 (14:36 +0100)
committerWilliam Breathitt Gray <william.gray@linaro.org>
Sat, 26 Nov 2022 21:49:28 +0000 (16:49 -0500)
commitfd5ac974fc25feed084c2d1599d0dddb4e0556bc
treed1254320c7b9f41c43c02f2bab5ccba550ed31b9
parent30a0b95b1335e12efef89dd78518ed3e4a71a763
counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update

The ARR (auto reload register) and CMP (compare) registers are
successively written. The status bits to check the update of these
registers are polled together with regmap_read_poll_timeout().
The condition to end the loop may become true, even if one of the register
isn't correctly updated.
So ensure both status bits are set before clearing them.

Fixes: d8958824cf07 ("iio: counter: Add support for STM32 LPTimer")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20221123133609.465614-1-fabrice.gasnier@foss.st.com/
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
drivers/counter/stm32-lptimer-cnt.c