[RISCV] Pre-process FP SPLAT_VECTOR to RISCVISD::VFMV_V_F_VL
authorFraser Cormack <fraser@codeplay.com>
Wed, 19 Jan 2022 13:54:11 +0000 (13:54 +0000)
committerFraser Cormack <fraser@codeplay.com>
Thu, 10 Feb 2022 09:56:00 +0000 (09:56 +0000)
commitfd43d99c93fc5b1f47686ce852e02b77119434b1
tree468b04b645f43328b8a769ac59b0d3a7930d2e7a
parenta76620143c54e0b40c7538f4ffa38f4c9db8a009
[RISCV] Pre-process FP SPLAT_VECTOR to RISCVISD::VFMV_V_F_VL

This patch builds on top of D119197 to canonicalize floating-point
SPLAT_VECTOR as RISCVISD::VFMV_V_F_VL as a pre-process ISel step.

This primarily benefits scalable-vector VP code, where our VP patterns
only match VFMV_V_F_VL to reduce the burden on our ISel patterns, but
where at the same time, scalable-vector code doesn't custom-legalize
SPLAT_VECTOR.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D117670
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll
llvm/test/CodeGen/RISCV/rvv/vfrsub-vp.ll
llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll