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[X86][SSE] Add add(shl(and(x,c1),c2),c3) test case with non-uniform shift value
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 14 Jan 2020 11:41:26 +0000 (11:41 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 14 Jan 2020 11:41:47 +0000 (11:41 +0000)
commitfd42a4ac7a69adb92f87c7fa927509f177dcc6ca
tree261bcf0821c8072ac5c17e48c7908e09b0157519tree | snapshot
parenta43b0065c5c78eba3fb83881fb628f5b8182db64commit | diff
[X86][SSE] Add add(shl(and(x,c1),c2),c3) test case with non-uniform shift value

As mentioned by @nikic on rGef5debac4302, we should merge the guaranteed top zero bits from the shifted value and min shift amount code so they can both set the high bits to zero.
llvm/test/CodeGen/X86/combine-shl.ll diff | blob | history
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