[DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)
authorVedant Kumar <vsk@apple.com>
Fri, 11 May 2018 18:40:08 +0000 (18:40 +0000)
committerVedant Kumar <vsk@apple.com>
Fri, 11 May 2018 18:40:08 +0000 (18:40 +0000)
commitfd340a404723d1dfb27d40e85945cd3ffadd8d80
tree355330408add5921862ef043e64396716379d848
parentf0e5f7c45e940c80623c60b89b28b8806a899841
[DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)

This teaches tryToFoldExtOfLoad to set the right location on a
newly-created extload. With that in place, the logic for performing a
certain ([s|z]ext (load ...)) combine becomes identical for sexts and
zexts, and we can get rid of one copy of the logic.

The test case churn is due to dependencies on IROrders inherited from
the wrong SDLoc.

Part of: llvm.org/PR37262

Differential Revision: https://reviews.llvm.org/D46158

llvm-svn: 332118
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/AArch64/arm64-ldp-cluster.ll
llvm/test/CodeGen/X86/avx512-insert-extract.ll
llvm/test/CodeGen/X86/fold-sext-trunc.ll
llvm/test/CodeGen/X86/known-signbits-vector.ll
llvm/test/CodeGen/X86/pr32284.ll
llvm/test/CodeGen/X86/vector-shuffle-variable-128.ll
llvm/test/CodeGen/X86/vector-shuffle-variable-256.ll
llvm/test/CodeGen/X86/widen_arith-4.ll
llvm/test/CodeGen/X86/widen_arith-5.ll