radv: Fix single stage constant flush with merged shaders.
authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Thu, 17 Oct 2019 23:21:29 +0000 (01:21 +0200)
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fri, 18 Oct 2019 10:49:29 +0000 (10:49 +0000)
commitfd21ee8b52fb9416b16c63fd34c699b1301ce30c
tree1fefcc2547ac485b25a30803105c2661f9c013b4
parent1b65c49c58c8a3d6a7b4a35a6e5c8f96d1828c23
radv: Fix single stage constant flush with merged shaders.

e.g. a VERTEX only flush with tess on Vega should look at the TCS
to see which bits are needed.

CC: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1953
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
src/amd/vulkan/radv_cmd_buffer.c