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(parent: 4332f1a) | patch
[AMDGPU] Handle frame index base operands in memOpsHaveSameBasePtr
authorJay Foad <jay.foad@amd.com>
Mon, 6 Jan 2020 13:37:29 +0000 (13:37 +0000)
committerJay Foad <jay.foad@amd.com>
Mon, 27 Jan 2020 14:45:21 +0000 (14:45 +0000)
commitfcf5254fa792353852a6a7604206dd4e93ad0f99
tree9b24cb3d3905f7cd2fce8766aae00a389440cd6btree | snapshot
parent4332f1a4c826d9351f005a4b78e0b1823a5943e0commit | diff
[AMDGPU] Handle frame index base operands in memOpsHaveSameBasePtr

Summary:
This is in preparation for getMemOperandsWithOffset returning more base
operands.

Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, arphaman, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73454
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp diff | blob | history
Domain: System / Toolchain;