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(parent: 37897c4) | patch
x86: Update SPL for coreboot
authorSimon Glass <sjg@chromium.org>
Fri, 1 May 2020 03:21:42 +0000 (21:21 -0600)
committerBin Meng <bmeng.cn@gmail.com>
Mon, 4 May 2020 07:28:28 +0000 (15:28 +0800)
commitfc486371c3696cf246163fc35e79c740a5d7d1b9
tree38a5d9e860eaa3f275e5bb36c983582331307fbftree | snapshot
parent37897c4073b408c6e0ea7faa4062b4e6876e9659commit | diff
x86: Update SPL for coreboot

At present SPL only works on bare-metal builds. With a few tweaks it can
be used for coreboot also.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/lib/spl.c diff | blob | history
Domain: System / Kernel;