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(parent: d17cb95) | patch
clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2
authorMark Zhang <markz@nvidia.com>
Wed, 7 Aug 2013 11:25:08 +0000 (19:25 +0800)
committerPeter De Schrijver <pdeschrijver@nvidia.com>
Mon, 25 Nov 2013 14:11:44 +0000 (16:11 +0200)
commitfc20eeff6c03fcdbb2b5ac21472778b573850e77
tree152cc4190bdfab23cbca6fae2547419f082a3da8tree | snapshot
parentd17cb95fa0b8676a38c0d07e2da26885d4ff8187commit | diff
clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2

pll_m will be the parent of gr2d/gr3d if we don't do this.
And because pll_m runs at a high rate so gr2d/gr3d will be
unstable. So change the parent of them to pll_c2.

Signed-off-by: Mark Zhang <markz@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
drivers/clk/tegra/clk-tegra114.c diff | blob | history
Domain: System / Kernel; Licenses: GPL-2.0;