OMAPDSS: add dedicated fck PLL support
authorTomi Valkeinen <tomi.valkeinen@ti.com>
Thu, 31 Oct 2013 14:42:13 +0000 (16:42 +0200)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Mon, 18 Nov 2013 12:32:28 +0000 (14:32 +0200)
commitfc1fe6e794cc85fcdb63daa9c7a977940ff49e4f
treedc061a3f7b568417296297e21f149ba1a00b8254
parent688af02d22c11a077532d6437e4afc7bdc972f82
OMAPDSS: add dedicated fck PLL support

This patch adds support for SoCs that have a dedicated DSS PLL used for
DSS function clock.

If there is no dss parent clock defined, it is presumed that the
functionl clock rate can be set (almost) freely. The code calculates the
highest allowed fck rate, which when divided with some integer gives the
required pck.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
drivers/video/omap2/dss/dss.c