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[Builtins] Fix div0 error in udivsi3
authorWeiming Zhao <weimingz@codeaurora.org>
Thu, 6 Apr 2017 06:13:39 +0000 (06:13 +0000)
committerWeiming Zhao <weimingz@codeaurora.org>
Thu, 6 Apr 2017 06:13:39 +0000 (06:13 +0000)
commitfbe67da29b08e7e52e0074989f15b2fa4c3cad98
treec0dde42666c985da4a90878b49d87c8d2b28b4a4tree | snapshot
parentf7298b0ef034feea0a69e0a9b975913d9e2a39d7commit | diff
[Builtins] Fix div0 error in udivsi3

Summary: Need to save `lr` before bl to aeabi_div0

Reviewers: rengolin, compnerd

Reviewed By: compnerd

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31716

llvm-svn: 299628
compiler-rt/lib/builtins/arm/udivsi3.S diff | blob | history
Domain: System / Toolchain;