AMDGPU/SI: Implement amdgcn image intrinsics with sampler
authorChangpeng Fang <changpeng.fang@gmail.com>
Wed, 10 Aug 2016 21:15:30 +0000 (21:15 +0000)
committerChangpeng Fang <changpeng.fang@gmail.com>
Wed, 10 Aug 2016 21:15:30 +0000 (21:15 +0000)
commitfb9c3818ddc2786382c398ca3d90876aba1fe376
treeb60e3f80239e072b0140be51269769f478e15bfc
parentd89875ca39f98e6df5a331b8c43eaa982822f0c4
AMDGPU/SI: Implement amdgcn image intrinsics with sampler

Summary:
  This patch define and implement amdgcn image intrinsics with sampler.

    1. define vdata type to be llvm_anyfloat_ty, address type to be llvm_anyfloat_ty,
       and rsrc type to be llvm_anyint_ty. As a result, we expect the intrinsics name
       to have three suffixes to overload each of these three types;

    2. D128 as well as two other flags are implied in the three types, for example,
       if you use v8i32 as resource type, then r128 is 0!

    3. don't expose TFE flag, and other flags are exposed in the instruction order:
       unrm, glc, slc, lwe and da.

Differential Revision: http://reviews.llvm.org/D22838

Reviewed by:
  arsenm and tstellarAMD

llvm-svn: 278291
llvm/include/llvm/IR/IntrinsicsAMDGPU.td
llvm/lib/Target/AMDGPU/SIInstructions.td
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.ll [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.ll [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ll [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.ll [new file with mode: 0644]