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(parent: c742d8d) | patch
[mlir] Use VectorTransferPermutationMapLoweringPatterns in VectorToSCF
authorMatthias Springer <springerm@google.com>
Mon, 17 May 2021 05:37:32 +0000 (14:37 +0900)
committerMatthias Springer <springerm@google.com>
Wed, 19 May 2021 05:46:19 +0000 (14:46 +0900)
commitfb7ec1f1873c82b758d606dc7e5b4687fc68dce2
tree27a23da85a522e470df3bba81b7ab8a0d948a6batree | snapshot
parentc742d8d23c2a1f500689efcd3b563cc956c5e173commit | diff
[mlir] Use VectorTransferPermutationMapLoweringPatterns in VectorToSCF

VectorTransferPermutationMapLoweringPatterns can be enabled via a pass option. These additional patterns lower permutation maps to minor identity maps with broadcasting, if possible, allowing for more efficient vector load/stores. The option is deactivated by default.

Differential Revision: https://reviews.llvm.org/D102593
mlir/include/mlir/Conversion/Passes.td diff | blob | history
mlir/include/mlir/Conversion/VectorToSCF/VectorToSCF.h diff | blob | history
mlir/include/mlir/Dialect/Vector/VectorOps.h diff | blob | history
mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp diff | blob | history
mlir/lib/Dialect/Vector/VectorTransforms.cpp diff | blob | history
mlir/test/Dialect/Vector/vector-transfer-lowering-to-scf.mlir [new file with mode: 0644] blob
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-permutation-lowering.mlir [deleted file] blob | history
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-1d.mlir diff | blob | history
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-2d.mlir diff | blob | history
mlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-3d.mlir diff | blob | history
Domain: System / Toolchain;