Masked load and store codegen - fixed 128-bit vectors
authorElena Demikhovsky <elena.demikhovsky@intel.com>
Fri, 19 Dec 2014 23:27:57 +0000 (23:27 +0000)
committerElena Demikhovsky <elena.demikhovsky@intel.com>
Fri, 19 Dec 2014 23:27:57 +0000 (23:27 +0000)
commitfb73ca516b3639a85ebd5658411bb2a4437a8550
tree260d475faf8adf6e3047c1e6355a4db041983429
parentdc103075249aeb0f1d187f8eedfe561634062c43
Masked load and store codegen - fixed 128-bit vectors
The codegen failed on 128-bit types on AVX2.
I added patterns and in td files and tests.

llvm-svn: 224647
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86InstrAVX512.td
llvm/lib/Target/X86/X86InstrSSE.td
llvm/test/CodeGen/X86/masked_memop.ll