arch/tile: Enable more sophisticated IRQ model for 32-bit chips.
authorChris Metcalf <cmetcalf@tilera.com>
Fri, 25 Jun 2010 20:41:11 +0000 (16:41 -0400)
committerChris Metcalf <cmetcalf@tilera.com>
Tue, 6 Jul 2010 17:34:01 +0000 (13:34 -0400)
commitfb702b942bf638baa6cbbbda9f76794db62921ef
treec065b0ab61cbb80b6209c725836a6864624b3c46
parentde5d9bf6541736dc7ad264d2b5cc99bc1b2ad958
arch/tile: Enable more sophisticated IRQ model for 32-bit chips.

This model is based on the on-chip interrupt model used by the
TILE-Gx next-generation hardware, and interacts much more cleanly
with the Linux generic IRQ layer.

The change includes modifications to the Tilera hypervisor, which
are reflected in the hypervisor headers in arch/tile/include/arch/.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
arch/tile/include/arch/chip_tile64.h
arch/tile/include/arch/chip_tilepro.h
arch/tile/include/asm/irq.h
arch/tile/include/asm/smp.h
arch/tile/include/hv/hypervisor.h
arch/tile/include/hv/pagesize.h [new file with mode: 0644]
arch/tile/kernel/hvglue.lds
arch/tile/kernel/irq.c
arch/tile/kernel/smp.c